Before jumping into floorplan implementation using tools like Innovus or ICC2, it’s essential to understand a few critical parameters. These parameters will guide your decisions and help you create a clean, optimized, and routable layout. Let’s break them down from basics to more advanced.
🧱 1. Core Area
The core area is the central region of the die (the complete chip) where all types of cells are placed. This includes:
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Standard cells
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Macros
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Blockages
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Physical-only cells
🧠 Important: No cells can be placed outside the core area. The placement engine works strictly within this boundary.
🔢 Formula to calculate core size:
Core size = (Standard cell area + Macro area + Blockages area) / Standard cell utilization
This ensures you allocate enough space for cells while considering your target utilization.
🧭 2. Aspect Ratio
The aspect ratio determines the shape of the core area. It’s the ratio of height to width.
📌 Formula:
Aspect ratio = Height of core area / Width of core area
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If the aspect ratio is 1.0, the core is a square.
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If it’s 0.5, the core is wider (width = 2 × height).
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If it’s 2.0, the core is taller (height = 2 × width).
This impacts how well the routing engine can handle congestion. Some routing patterns work better in square or slightly rectangular regions depending on design constraints.
🧠 Alternative formula (tool-specific):
Aspect ratio = Horizontal routing tracks / Vertical routing tracks
The number of routing tracks in horizontal/vertical directions influences the actual shape and routing capacity.
🧱 3. Routing Tracks
A routing track is a virtual line on a metal layer used to guide routes. These don’t physically exist but act as reference paths for router algorithms.
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Routing tracks run horizontally or vertically.
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The distance between two tracks is called pitch.
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Routers snap nets to these tracks for efficient alignment and DRC compliance.
These tracks are tightly packed and follow the design rules of the technology.
📊 4. Utilization
Utilization defines how much of the core area is occupied by cells.
📌 Formula:
Utilization = (Standard cell area + Macro area) / Core area × 100%
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Typically, standard cells use 70% of the area, and routing uses the remaining 30%.
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However, if your design has large macros, you may need to reduce standard cell utilization to ensure there’s still room for routing.
💡 Tip: Over-utilizing space will lead to routing congestion and timing violations. Under-utilizing wastes silicon.
🏭 5. Manufacturing Grid
The manufacturing grid defines the minimum resolution the foundry can fabricate on silicon. It represents the smallest step size or point on a grid where a feature can be drawn.
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Found in your tech LEF file.
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Example: A manufacturing grid of 0.005 µm means you can’t define geometries smaller than this step.
This grid ensures layout precision and foundry compatibility.
📐 6. Standard Cell Site
A standard cell site is the basic unit size in a floorplan where cells can be placed.
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It has minimum width and height, and all standard cells are placed in multiples of this size.
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Even filler cells (used to fill gaps) occupy one or more sites.
💡 Knowing site size helps you visualize and optimize row placement and macro fitting.
🏢 7. Standard Cell Rows
The core area is divided into rows, and these rows are where standard cells are placed.
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All rows have fixed height, and standard cells align within these rows.
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The width of the standard cells may vary, but the height is always a multiple of the site height.
This alignment ensures:
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Power rails (VDD/VSS) match
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Clean placement
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No DRC violations
🔄 8. Inverted Rows
To share power rails efficiently, alternate rows are inverted.
Example:
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Row 1: VDD on top, VSS on bottom
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Row 2: VSS on top, VDD on bottom
Why?
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Cells in adjacent rows can share the same VSS/VDD rails.
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This saves routing resources and core area.
If you don’t follow this inverted row structure, you’d need to leave extra space between rows, wasting valuable area.
A good floorplan is the foundation of a successful physical design flow. Understanding and correctly applying:
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Core size
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Aspect ratio
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Routing tracks
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Utilization
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Manufacturing grid
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Cell sites and rows
…ensures your layout is not only functional but also optimized for timing, area, and power.