Signal integrity is the ability of an electrical signal to carry information reliably and resist the
effects of high-frequency electromagnetic interference from nearby signals.
What is crosstalk?
Crosstalk is the undesirable electrical interaction between two or more physically adjacent nets
due to capacitive cross-coupling.
As integrated circuit technologies advance toward smaller geometries, crosstalk effects
become increasingly important compared to cell delays and net delays.


first for a 0.25-micron technology and then for a 0.13-micron technology.
As circuit geometries become smaller, wire interconnections become closer together and taller,
thus, increasing the cross-coupling capacitance between nets.
At the same time, parasitic capacitance to the substrate becomes less as interconnections become narrower, and cell delays are reduced as transistors become smaller.
With circuit geometries at 0.25 micron and above, substrate capacitance is usually the dominant
effect. However, with geometries at 0.18 micron and below, the coupling capacitance between
nets become significant, making crosstalk analysis increasingly important for accurate timing
analysis.
The Miller Effect
The Miller effect describes the extent to which sudden changes in voltage level of adjacent nets
cause the coupling portion of the capacitive load to increase or decrease as discerned by the
victim nets driving gate.
The positive or negative impact of the Miller effect is dependent on the relative switching directions of aggressor and victim nets.
- When aggressor nets switch in the opposite direction from a victim net, a positive Miller effect
increases the capacitance between them and magnifies delay. If aggressor and victim slew rates
are equal, the late timing (setup) coupling capacitance doubles because the voltage difference is
doubled. - When aggressor nets switch in the same direction as a victim net, a negative Miller effect
reduces the capacitance between them and accelerates timing. If aggressor and victim slew rates
are equal, the early timing (hold) coupling capacitance is negated.
Crosstalk Delay Effects
Crosstalk can affect signal delays by changing the times at which signal transitions occur. For
example, consider the signal waveforms on the cross-coupled nets A, B, and C in Figure 1-2

Because of capacitive cross-coupling, the transitions on net A and net C can affect the time at
which the transition occurs on net B.
A rising-edge transition on net A at the time shown in Figure1-2 can cause the transition to occur later on net B, possibly contributing to a setup violation for a path containing B.
Similarly, a falling-edge transition on net C can cause the transition to occur earlier on net B, possibly contributing to a hold violation for a path containing B.
A Miller factor (a number typically between 0 and 2) is used to scale coupling capacitance for
wire load correction.
When there is a positive Miller effect between nets (because they switch in
opposite directions), delay is scaled up by multiplying the coupling capacitance between the nets
by the maximum Miller factor. The typical value is 2, assuming equal slew rates.
- When there is a negative Miller effect between nets (because they switch in the same direction),
hold time is scaled down by multiplying the coupling capacitance between them by the minimum
Miller factor. When aggressor and victim slew rates are equal, the typical value is 0. This implies
that the effect of coupling capacitance is negated. - When adjacent aggressor signals are not switching at the same time as their victim net, delay
may not be affected. The coupling capacitance between the nets is multiplied by a nominal Miller
factor, typically 1.
Crosstalk Noise Effects
Figure 1-3 Glitch Due to Crosstalk

In Figure 1-3 Net B should be constant at logic zero, but the rising edge on net A causes a noise
bump or glitch on net B. If the bump is sufficiently large and wide, it can cause an incorrect logic
value to be propagated to the next gate in the path containing net B.
Aggressor and Victim Nets
A net that receives undesirable cross-coupling effects from a nearby net is called a victim net. A
net that causes these effects in a victim net is called an aggressor net. Note that an aggressor net
can itself be a victim net; and a victim net can also be an aggressor net.
The terms aggressor and victim refer to the relationship between two nets being analyzed.
The timing impact of an aggressor net on a victim net depends on several factors:
- The amount of cross-coupled capacitance
- The relative times and slew rates of the signal transitions
- The switching directions (rising, falling)
- The combination of effects from multiple aggressor nets on a single victim net

Figure 1-4 Effects of Crosstalk at Different Arrival Times
Figure 1-4 illustrates the importance of timing considerations for calculating crosstalk effects.
The aggressor signal A has a range of possible arrival times, from early to late.
If the transition on A occurs at about the same time as the transition on B, it could cause the
transition on B to occur later as shown in the figure, possibly contributing to a setup violation; or
it could cause the transition to occur earlier, possibly contributing to a hold violation.
If the transition on A occurs at an early time, it induces an upward bump or glitch on net B before
the transition on B, which has no effect on the timing of signal B.
However, a sufficiently large bump can cause unintended current flow by forward-biasing a pass transistor.
Similarly, if the transition on A occurs at a late time, it induces a bump on B after the transition
on B, also with no effect on the timing of signal B.
However, a sufficiently large bump can cause a change in the logic value of the net, which can be propagated down the timing path.
Timing Windows and Crosstalk Delay Analysis
There are three analysis modes with respect to operating conditions: single, best-case/worst_
case, and on-chip variation. PT SI uses the on-chip variation mode to derive the timing window
relationships between aggressor nets and victim nets.
Using the on-chip variation mode, PT SI finds the earliest and the latest arrival times for each
victim net and aggressor net.
The range of switching times, from earliest to latest arrival, defines a timing window for the victim net, and defines another timing window for the aggressor net. Crosstalk timing effects can occur only when the victim and aggressor timing windows overlap.
PT SI performs crosstalk analysis using multiple iterations. For the first iteration, it ignores the
timing windows and assumes that all transitions can occur at any time.
This results in a pessimistic but fast analysis that gives approximate crosstalk delay values.
In subsequent analysis iterations, PT SI considers the timing windows and eliminates some
victim-aggressor relationships from consideration, based on the lack of overlap between the
applicable timing windows.
When an overlap occurs, PT SI calculates the effect of a transition occurring on the aggressor net
at the same time as a transition on the victim net.
The analysis takes into account the drive strengths and coupling characteristics of the two nets.
