Electromigration and IR drop in ASIC Physical Design
we push through lower technology nodes in the IC and chip design, the wire width goes thinner along with transistor […]
PNR
What is Max Fanout in CMOS
Max Fanout in VLSI Fanout for CMOS gates is the ratio of the load capacitance (the capacitance that it is
Checks after each stage in Physical Design
What are all the things to check once floorplan is done After the placement of macros and IOs, please do
How to solve congestion in ICC2 tool
Solving Congestion with practical approach What is Congestion in VLSI? Congestion in VLSI (Very large-scale Integration) design refers to the
Physical Design Flow in VLSI
PD Flow in VLSI Synthesis flow The high-level RTL code is transformed into an optimized gate-levelrepresentationElaborate outputGTECH File Floor Planning
What is Electromigration in VLSI?
Electromigration: Electromigration is an unwanted slow movement of materials in a semiconductor. It is similar to an Iron bridge which
Crosstalk Analysis
Signal integrity is the ability of an electrical signal to carry information reliably and resist theeffects of high-frequency electromagnetic interference
Types of clock trees in CTS
There are many clock tree structures used widely in the design industry, each of which has itsown merits and demerits.
Uncertainty in Physical Design
How uncertainty is estimated at each stages of Physical Design? * Frequency * Technology * Latency * Jitter * Skew
Placement and Routing
PnR in VLSI Two fundamental stages in the VLSI design flow that significantly impact performance, area efficiency, and power consumption